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High Speed Design

There has been several changes in the design methodologies during the recent past years. It is inevitable designer to know these changes to pace with the technology. Several years back, the electrical design constraints for the designer was only current, voltage and some extent track resistance. In the modern design centers have many other new terms for high speed designs. They are track propagation delays, rise times, characteristic impedance, cross talk of both forward and back ward types, differential and common mode power planes, double side mounting of surface mount devices, controlled impedance lines etc. Merely an electrical connection will not serve the purpose continuity and signal integrity in high speed design. It is very difficult spell all the design rules in the layout design because there will be differences in the design requirements from layout to layout. However we have brought out some common practices for helping the designer for designing a high performance PCB layout.

 
Lesser the track length, better the design

High frequency signal tracks should be as short as possible. Long routes, particularly those that operate at high frequencies and edge rates, generate EMI. Long routes are also more susceptible to EMI. Long routes, particularly at high frequencies and fast rise times, generate EMI and are also susceptible to EMI.

Stubs in the high speed tracks

Stubs (branches from the main routing path) cause unwanted reflections if they exceed the maximum allowable stub length for the signal carried by the bet. This generates additional EMI as well as causing a signal distortion.

Pouring copper for reducing characteristic impedance

A surrounding shield provides a local return path for EMI. Track shielding also reduces the characteristic impedance of high-speed nets. A common way to reduce emissions is to fill spare areas of each layer with copper, thus providing an effective screen to all signal tracks on the layer. However, these areas of copper can act secondary radiators of EMI and should always be connected to a power plane

Loop Antenna Elimination

A tracking loop constitutes a loop antenna for EMI. Radiation is generated in the plane of the loop. This rule considers fully closed loops only. The severity of each loop is approximately proportional to the square of the operating frequency times the approximate loop area

Mitering the track

Right-angled, and more acute corners, cause field concentrations which increases EMI, particularly where the 'edge rate' is high.

Impedance setting and the design technology

Areas of high characteristic impedance give higher emissions. In order to reduce EMI and Susceptibility for a design, it is good practice to reduce the inductance and increase the capacitance of the signal tracks. The characteristic impedance of a transmission line is approximately: sqrt(L/C). So, to reduce the impedance, you need to increase the capacitance (C). You can increase the capacitance of a track by shielding it, or by altering the dielectric between the track and the Power plane.

Reducing the impedance

In order to reduce the EMI and Susceptibility you can attempt to reduce inductance and/or increase capacitance in the signal tracks.

The characteristic impedance of a line is approximately the square root of L/C (the unit length inductance divided by the unit length capacitance). So high impedance areas are an indication that additional capacitance is required.

Ground planes

Some of your designs may make use of multiple Power planes at different voltages.

It is not good practice to overlap the planes of different voltages (this can lead to undesirable noise current distribution throughout the system).

It is also good practice to overlap corresponding Power planes (this gives additional capacitive decoupling).. For example, the 5 Volt plane and its corresponding Ground plane).

Overlapping Ground planes are capacitively coupled to each other - so noise can transfer from one to another.

In addition, large copper areas are excellent radiators of EMI, so it is good practice to prevent high frequency signals from appearing on Ground planes.

On any design using high-speed components, at least one Ground plane should exist to ensure reasonable control of emissions. The existence of a Ground plane also ensures that the characteristic impedance of routes is well defined, and is effective in suppression of excessive inter-route cross talk. Partial plane s are also useful in this situation.

A Ground or Power plane may become excessively perforated by through-hole pins, vias and thermal relief cut-outs in a particular area. This has the effect of increasing the resistance of the plane in that area, and the impedance of the total plane. This can result in transient conditions on the board, leading to increased EMI.

Efficient placement

Placing the highest speed/power components in close proximity to the source of power reduces transient problems. For boards without ground planes, radiation is reduced due to the reduced power signal loop areas.

Setting the power rails

Certain designs require several voltage power rails which are associated with different Power planes. For example there may be 5V Logic power rail, together with 12V rails for the Analogue devices.

These power rails will have corresponding ground rails which may also be Power planes. It is good practice to overlap ie. Keep separate power planes one over another as different layers. This will increase the capacitive de-coupling of the power supply.

De-coupling capacitors

The appropriate de-coupling of components is essential in order to reduce transient conditions on supply connections. The de-coupling capacitor appropriate to a device depends on a number of electrical parameters associated with the device itself. These parameters include voltage levels, rise times, and power supply transient current values.

Appropriate de-coupling of active components reduces component noise and power plane transients. Reducing the voltage transients on power supply connections reduces emissions from the signal loops formed by the power connections. Although circuit conditions affect the choice of de-coupling capacitor to a certain extent, the technology of the device being de-coupled is the most important factor in the choice of capacitor and method of de-coupling.

Signal cross talk

The cross talk levels expected on the design must be quantified in order to reduce interference between lines.

Cross-talk is caused by parallel, or near parallel, tracks on the same board layer. or on adjacent board layers. A change of state on one line causes interference on another due to mutual capacitance and inductance between the lines.

The net causing cross-talk is known as the active net. The net receiving (picking up) the cross-talk is called the passive net. The active signal is the signal on the active net.

There are two types of cross-talk:

Backward Cross-talk

This is usually the dominant form. The backward cross-talk signal travel down the passive line in the opposite direction to the active signal. It is always of the same polarity as the active signal

Forward Cross-talk

This is a secondary effect which occurs predominately on the outer board layers. The forward cross-talk signal travels in the same direction as the active signal, and is usually of opposite polarity.

Route segments on the adjacent layers of multi-layer boards should run at right angles to each other. This helps to reduce electromagnetic interference by reducing capacitive coupling between routes on adjacent layers.

Track resonance cannot be over ruled

As the time-length of a route (given by the delay along the track) approaches a multiple of a quarter of the signal wavelength (or a harmonic of that signal), its efficiency as a radiating antenna increases. This increase the electromagnetic radiation from the route, and also enhances the route's susceptibility to externally generated electromagnetic interference.

The Track Resonance rule uses the frequency of operation, and rise time of a signal on the net, to derive a set of harmonic frequencies where quarter-wavelength tuning is significant.

High frequency nets with long routes should be terminated to avoid extra high frequency harmonics. Each track has a critical length above which reflections are a maximum, and below which they are reduced. This critical length occurs when the round-trip delay time along the track is equal to the rise-time of the signal. It is recommended practice to terminate lines whose length is close to or above this critical value.


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